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(KPSSHIL) Korea gPS Software-Hardware In Loop

Location

ETRI, Daejeon, South Korea

Date

07.2022 ~ 11.2022

Project type

FSW, EGSE, FPGA RTL (VHDL, Verilog), SystemC

In addition to developing functional improvements and stabilizing the SIL framework, we wanted to extend the SW-HW-in-the-loop (SHIL) integration platform by connecting the L6 satellite navigation signal generator based on the HW-FPGA board of the KPS Satellite Navigation Research Center (in ETRI) to the SIL framework to perform accuracy verification that the developed SIL framework is stable and normal.

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